1. Field of the Invention
The present invention relates to a design verification device in the plan design drawing of, for example, a semiconductor integrated circuit, to calculate the distance between the designed diagram data for automatically verifying whether the design is carried out according to previously set design reference values.
2. Description of the Background Art
FIG. 1 is a plan view showing diagram data in the plan design drawing of a semiconductor integrated circuit. FIG. 2 is a sectional view of the semiconductor integrated circuit of FIG. 1 taken along line 2--2. Referring to FIGS. 1 and 2, a contact hole 1 is formed in an insulation film 5 to make contact with an n.sup.+ diffusion region 3. An Al interconnection 4 is formed in contact hole 1. The drain of the MOS transistor having a channel formed in the overlapping region of n.sup.+ diffusion region 3 and Al interconnection 4 is connected to Al interconnection 4 through contact hole 1. A gate polysilicon 2 is formed between adjacent n diffusion regions 3.
It can be seen from FIG. 2 that gate polysilicon 2 is separated from Al interconnection 4 by insulation film 5. FIG. 2 shows the normal case where there is no positioning offset of gate polysilicon 2 in the photolithodiaphic process of printing the pattern of contact hole 1 in an Si substrate.
FIG. 3 shows the case where there is positioning offset of gate polysilicon 2. Such a positioning offset causes shorting to occur between Al interconnection 4 and gate polysilicon 2.
In order to prevent shorting caused by positioning offset, the distance d (shown in FIG. 1) between contact hole 1 and gate polysilicon 2 is set as a design reference value previously in the stage of designing to design a circuit pattern diagram.
A design verification device has been developed having a program that automatically checks by computing whether the design reference is satisfied in all the design drawings. Such a design verification device is called DRC (Design Rule Check).
FIG. 4 is a plan view showing an error determination boundary according to a conventional design rule check method. Referring to FIG. 4, an error determination boundary 1b is a virtual diagram joining points having a distance of a from contact hole 1. Error determination boundary 1b is enclosed with straight lines of I and III which are the parallel displacement of the top and bottom sides and the left and right sides of contact hole 1 by the distance of a, and with a corner portion II which is a circular arc having a radius of a where the vertex of the corner portion of contact hole 1 is the center point.
FIG. 5 is a plan view showing an example of a diagram data in which determination is made of no error with respect to error determination boundary 1b. Determination is made of no error if the diagram of gate polysilicon 2 does not transgress error determination boundary 1b, as in the case of the three gate polysilicons 2 of FIG. 5.
FIG. 6 is a plan view showing an example of a diagram data where determination is made of an error with respect to the error determination boundary 1b of FIG. 4. It can be seen from FIG. 6 that gate polysilicon 2 transgresses the error determination boundary 1b, resulting in the determination of an error.
FIG. 7 is a plan view showing the offset between a completed plan pattern and the design plan pattern. Referring to the design plan pattern of a rectangular contact hole 1 of FIG. 7, the plan pattern comes nearer to a circle with the width of the longer side broadened due to a slight blur of image of the optical system in photolithography or difference in the etching rate, whereby the completed plan pattern 10 is enlarged towards the longer side.
It is necessary to set the design reference value of the longer side to be larger than that of the shorter side in order to carry out design reference checking taking into consideration the actual configuration of the product after manufacturing.
A conventional method of design rule checking in shown in FIGS. 8 and 9 where the design reference value differs between the long side and the short side.
In the checking method of FIG. 8, the error determination boundary is provided with design reference value "b" for the long side, design reference value "a" for the short side, and a circular arc of radius "a" for the corner portion. In this case, an error can not be detected even if there is a gate polysilicon 2 that should be determined as an error.
FIG. 9 shows an error determination boundary where a circular arc of not radius "a" which is the design reference value for the short side, but of radius "b" which is the design reference value for the long side, is employed for the corner portion. In this case, determination is made of an error which should really be not.
Thus, there were cases where erroneous determination was made, as described in the foregoing, when different design reference values were set for the direction of the x axis and the y axis in the conventional method of design rule checking.